The present invention relates to an edge correcting circuit for correcting the edge of the image represented by a digital image signal.
In a display device used as a display terminal for a personal computer or a television set, edge correction by means of digital signal processing is adopted as a method for enhancing the edge of the displayed image to improve the sharpness. Generally, a high-frequency signal is extracted by passing the digital image signal through digital filters, and adding the high-frequency signal to the original signal, to obtain the edge-corrected image signal.
FIG. 16 is a diagram showing a conventional edge correcting circuit. This edge correcting circuit comprises an input terminal 101 for receiving a digital image signal Sa, a one-pixel delay unit 1 for delaying the signal Sa by one pixel period to output a signal Sb, a one-pixel delay unit 2 for delaying the signal Sb by one pixel period to output a signal Sc, a one-pixel delay unit 3 for delaying the signal Sc by one pixel period to output a signal Sd, a one-pixel delay unit 4 for delaying the signal Sd by one pixel period to output a signal Se, a high-frequency extracting circuit 5 formed of digital filters, an adder 8, and an output terminal 102 for outputting the edge-corrected image signal.
The operation of the conventional edge correcting circuit will next be described with reference to FIGS. 17A to 17E.
First, let us assume that an image signal Sa shown in FIG. 17A is applied to the input terminal 101. The image signal Sa is successively delayed by the one-pixel delay units 1, 2, 3 and 4 to result in the signals Sb, Sc, Sd and Se. FIGS. 17B and 17C show the signals Sc and Se.
The high-frequency signal extracting circuit 5 performs calculation using the signals Sa, Sc and Se, to produce a high-frequency signal Sf shown in FIG. 17D. The signal FIG. 17D is a high-frequency signal whose amplitude is maximum at the rising and falling parts of the input signal (Sa).
As an example, the high-frequency signal extracting circuit 5 multiplies the input signals Sa, Sc and Se by the coefficients −¼, ½ and −¼, and adds the products together, and adjusts the amplitude as required. When the amplitude is quadrupled by the amplitude adjustment, the output signal Sf will represents Sf=−Sa+2Sc−Se, as illustrated.
The high-frequency signal Sf output from the high-frequency extracting circuit 5 is added at the adder 8 to the original signal Sc with its delay due to the high-frequency extracting circuit 5 compensated. As a result, a signal Sp obtained by the edge-correction is as shown in FIG. 17E. In FIG. 17E, values less than 0 are shown, but in the case where the signal is used for display in a display device, the values less than 0 are clipped.
The conventional edge correcting circuit as described above is associated with excessive overshoots and undershoots (they both will be referred to simply as “overshoots”) at the edge parts. It is possible to make the overshoot less prominent by reducing the high-frequency signal by the amplitude adjustment within the high-frequency extracting circuit 5, but in that case the necessary edge enhancement cannot be made adequately.